The present invention generally relates to a clock source selector circuit which provides at least one set of clock signals which are selected from a plurality of clock sources and more particularly to such a clock source selector circuit which provides a plurality of clock signal sets from a plurality of available fixed clock sources. The clock source selector, when a new clock source is to be selected, interrupts the clock signals synchronously with an old clock source, provides the clock source transition to the new clock source, and thereafter restarts the clock signals in synchronism with the new clock source.
Sources of clock signals are required in many applications. One such application is in central processing systems wherein the central processing unit clock frequency of the system must be varied to meet certain demands. For example, during periods of high activity when the central processing unit is performing and executing instructions at a high rate, the clock signal frequency must be high, but when the central processing unit activity is low and the central processing unit is performing and executing instructions at a slow rate, the clock signal frequency must be reduced to conserve power. In addition, many systems, such as central processing systems, require many sources of clock signals.
In the prior art, such sources of clock signals have been derived by programmable clock source circuits such as programmable dividers. These circuits are generally complex and consume a large amount of power. While these circuits have been generally successful, they are not well suited to portable system applications such as compact, lap-top personal computers.
As a result, there is a need in the art for an improved source of clock signals. The present invention provides such an improvement by implementing a programmable clock source selector which selects from a plurality of fixed clock sources. The clock source selector of the present invention operates independently of the phase relationships of the fixed clock sources and provides for synchronous clock source selection.